Careers
ASIC/SoC Design Engineer
| Requisition # | D001 |
| Job Title | ASIC/SoC Design Engineer |
| Post Date | 7/27/2010 |
| Job Area | Engineering - Hardware |
| Location | California - San Diego |
| Job Function | Tensorcom is a pioneer in 60 GHz WPAN communication
technology. Tensorcom is developing the most advanced
ultra-low power wireless technology in the wireless
marketplace and Tensorcom’s Digital Design Team is
actively seeking senior SoC Digital designers. Opportunities for exceptional ASIC engineers (digital design) to implement complex SoC (System on Chip) for 60 GHz wireless connectivity applications using the latest EDA tools and methodologies. Work in a start-up team environment with aggressive schedule, chip power consumption and area targets. |
| Skills/Experience | - Strong ASIC design background with previous
experience in implementing SOC designs using latest
Cadence, Synopsis and/or Magma toolsets. - Full chip architecture planning including digital design, and analog/mixed signal design support. - Technical depth in the areas of chip architecture, microprocessor & high speed bus architecture, memory controller, high speed peripherals, and integration of third-party IP. - Expertise in high speed RTL designs and verification, gate level synthesis and simulation, timing closure, power and signal integrity analysis and testability. - A team player with good interpersonal and leadership skills. - Previous experience in high speed SoC such as UWB SoC is a plus. - Knowledge of 60 GHz is a plus. - Knowledge of Wireless Connectivity is a plus - Minimum 5 years of experience. |
| Education Requirements | Bachelor's degree in Electrical Engineering
required. Master's degree in Electrical Engineering preferred. |
How to apply:
Please email resume to jobs@tensorcom.com. Refer to job title and requisition number listed above.